For more information:
Elaine Potter
1.480.483.4441
epotter@reedbusiness.com

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Conference Proceedings Now Available

If you were unable to attend Fall Microprocessor Forum 2006, you still have an opportunity to benefit from In-Stat’s presentation materials.
Forum Proceedings
(All Files on Flash Drive)
$395.00 each  QTY

In-Stat thanks all those who participated in making this year's Fall Processor Forum a success.


Monday, October 9th
7:30 AM
  Registration  
12:00 PM
  Lunch
8:30 AM
  Seminar begins  
2:40 PM
 

Afternoon break

10:00 AM
  Morning coffee break  
5:00 PM
  Adjourn
Note: Break and lunch times may vary.
Tuesday, October 10th
7:30 to
8:30 AM
  Registration and Continental Breakfast
8:30 AM
 

Welcome and Intro

8:35 AM
 

Keynote: Dileep Bhandarkar, Intel

9:20 AM
 

Session One: New Server Architecture

10:25 AM
 

Break (20 minutes)

11:45 AM
 

Lunch (60 minutes)

12:45 PM
 

Keynote: Ted Vucurevich, Cadence

1:30 PM
 

Session Two: Processor Cores

3:05 PM
 

Break (20 minutes)

3:25 PM
 

Session Three: Multicores for Embedded Applications/Part One

5:30 PM
  Adjourn to Expo
 
Wednesday, October 11th
7:30 to
8:30 AM
  Registration and Continental Breakfast
8:35 AM
 

Keynote: John Cornish, ARM

9:20 AM
 

Session Four: Multicores for Embedded Applications/Part Two

10:25 AM
 

Break (20 minutes)

11:45 AM
 

Lunch (60 minutes)

12:45 PM
 

Keynote: Kurt Kennett, Microsoft

1:30 PM
 

Session Five: Multimedia at the HW-SW Interface

3:05 PM
 

Break (20 minutes)

4:25 PM
 

Keynote Panel: ARM, Cadence, Intel, Microsoft

5:10 PM
  Adjourn

Compared with today’s scenario, the first Microprocessor Forum (MPF) had it easy. We were all wondering about the differences between RISC and CISC with AMD, Intel, MIPS, Motorola and Sun on one side, and Intel, Motorola, and National on the other. Yes, some companies had both types of engines. MPF became the event at which computer architects wanted to announce their latest chips. Expert panels debated the merits of RISC against CISC and the features of one desktop chip over another. Fairchild introduced a combined RISC-CISC architecture to save memory. Embedded applications were almost invisible. The commercial DSP was six years old and Maxwell Smart’s wireless shoe phone was a recent memory.

Today, there are countless processor architectures and configurations and a myriad of websites where one can find information and opinions. Big companies have their own developer conferences. Like an extensible ISA, the Microprocessor Forum has enhanced its contents to provide the concentrated insight about trends and architectures needed by designers and technical business people. MPF was, until now, just the most visible event in the world for announcing new architectures and chips. It is now adding to each presentation technical background and design considerations.

In-Stat will celebrate its 25th year of operations in 2006 by hosting a unique and exciting presentation of our Microprocessor Forum. We want to ensure that this event is a memorable one for all as we mark not only 25 years of In-Stat following the development of the semiconductor industry, but the huge advancements that chip design has had on the global economy over the same period. To commemorate the event, we are bringing back, on a one-time basis only, our Chip Portfolio that will highlight key industry players and their contribution to chip enhancement and performance over the years. This will be our most successful event to date!

Space is limited for this one-time event, so please register now!


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